Plenary SpeakersIn addition to almost 550 regular papers, Eusipco2009 will feature a number of plenary speakers from internationally renowned industry and academic experts. (The full list of 7 speakers will appear here shortly along with the dates and times for each speaker.) Currently confirmed speakers include:
► Influencing change and promoting solutions- old verities and
new paradigms – history, trends and challenges in Signal Processing Professor Tariq Durrani, University of Strathclyde, Scotland, UK Tariq
Durrani will present the opening keynote plenary of the Conference,
drawing on his 40 years experience in signal processing.
Professor Tariq Durrani
is with the University of Strathclyde, Scotland, UK, where he was
Deputy Principal of the University from 2000-06. After doctoral
and postdoctoral research at Southampton, he joined the University of
Strathclyde, Glasgow, as a Lecturer in 1976, and was appointed
Professor of Signal Processing in 1982, the first on the subject in the
UK. He was Head of the Department of EEE from
1986-90. For the past 30 years, he has worked on and
supervised some 60 projects sponsored by the EPSRC, the UK Department
of Trade and Industry, Ministry of Defence, the US Navy, EEC-ESPRIT, EU
BRITE-EURAM, RACE, and by several industrial organizations. He has
supervised more than 40 PhD students and is the author/co-author of
over 340 papers and six books. His research interests are in the
areas of Statistical Signal and Image Processing, Technology Management
and Higher Education Management. Professor Durrani is a Director
of: the UK Leadership Foundation for Higher Education; the Glasgow
Chamber of Commerce; the Institute for System Level Integration; and
Council Member of the Scottish Funding Council. He is Vice President of
the Royal Society of Edinburgh - the national academy of Scotland.
Professor Durrani has been the General Chair of several flagship
international conferences, including IEEE ICASSP’89, Transputers’ 91,
IEEE IEMC-2002, European Universities Convention -2006, IEEE ICC-007,
and the Triple Helix VII International Conference-2009. Professor
Durrani is Past President of the IEEE Signal Processing Society and of
the IEEE Engineering Management Society; past Chair of the IEEE
Periodicals Council, member of the IEEE Publications Board, past member
of the IEEE Education Board, and Chair of the IEEE Education Board
Awards and Recognition Committee, and Member of the IEEE Medal of Honor
Committee. He was instrumental in establishing the prestigious
IEEE Jack Kilby Medal in Signal Processing, and the IEEE /RSE Wolfson
Maxwell Medal. He is a Fellow of the Royal Academy of
Engineering, the Royal Society of Edinburgh and the IEEE. He was
awarded the OBE in the Queen’s Honours List in December 2002 for
services to electronics and higher education.
Dr Ken Stewart, Motorola, USA
With the completion of 3GPP LTE Release 8, broadband cellular system design and deployment has entered a new phase where 4G systems such as LTE – including FDD and TDD variants – move from the trials phase into commercial deployment. This presentation describes the key component technologies comprising LTE Release-8, including multi-antenna processing, self-optimising networks, and femto-cells and compares critical functionality and network and user-perceived performance with WiMAX (802.16e) and 3G HSPA(+). The emerging commercial deployment “footprint” of each technology, including spectrum aspects, is considered in combination with terminal availability, certification and system field trial status. Finally, we look ahead to 4G+ systems such as LTE-Advanced, which will offer further enhancements in system bandwidth, data rate, latency and MIMO processing capability for deployment in new and re-mined spectrum to be made available in the decade 2010-2020. Dr. Kenneth (Ken) Stewart is Vice President, Standards and Research at Motorola Mobile Devices. where he leads the Standards and Research Laboratory, and is responsible for directing and advising senior leadership on Mobile Devices' international standards and research strategy in radio access networks, multimedia systems and mobile applications and services. He has engineered and delivered advanced receiver designs in Motorola base stations and mobile devices for CDMA, GSM, WCDMA, HSPA and LTE. Advanced research in air interface technology remains a core interest of Dr. Stewart, including 3GPP High Speed Packet Access (HSDPA and HSUPA) and 3GPP LTE and LTE-Advanced (LTE-A). Dr. Stewart has authored more than 25 issued patents, with multiple patents pending. Back to top Prof Josef Kittler, University of Surrey, UK
Sensory information acquired by pattern recognition systems is invariably subject to environmental and sensing conditions, which may change over time. For imaging sensors, for instance, this includes illumination changes, pose and view-point changes, noise, distortion, blurring, etc. Signal degradation has a significant negative impact on the performance of pattern recognition algorithms. In the past, these problems have been tackled one by one by the incorporation of ever increasing degree of invariance to such degradation phenomena in the adopted signal representation. More recently, the possibility of enhancing the pattern classification system robustness by using auxiliary information has been explored. In particular, by measuring the extent of degradation, the resulting signal “quality” information can be used with advantage to combat any signal corrupting effects. This can be achieved either by using the auxiliary quality information as meta knowledge to control the sensory data interpretation process, as features in an augmented data representation space, or as features or control parameters in a post-processing stage. Different architectures have been suggested for decision making using quality information. Examples of these architectures will be presented and their relative merits discussed. The problems and benefits associated with the use of quality information in signal analysis will be illustrated on the problem of personal identity verification and recognition in biometrics, with a focus on multimodal biometrics approaches. Professor Josef Kittler heads the Centre for Vision, Speech and Signal Processing at the Faculty of Engineering and Physical Sciences, University of Surrey. He received his BA, PhD and DSc degrees from the University of Cambridge. He teaches and conducts research in the subject area of Signal Processing and Machine Intelligence, with a focus on Biometrics, Video and Image Database retrieval, Automatic Inspection, Medical Data Analysis, and Cognitive Vision. He published a Prentice Hall textbook on Pattern Recognition: A Statistical Approach and several edited volumes, as well as more than 500 scientific papers, including in excess of 150 journal papers. He serves on the Editorial Board of several scientific journals in Pattern Recognition and Computer Vision. He became Series Editor of Springer Lecture Notes on Computer Science in 2004. He served as President of the International Association for Pattern Recognition 1994-1996. He was elected Fellow of the Royal Academy of Engineering in 2000. In 2006 he was awarded the KS Fu Prize from the International Association in 2006, for outstanding contributions to pattern recognition. He received Honorary Doctorates from the University of Lappenranta in 1999 and the Czech Technical University in Prague in 2007. In 2008 he was awarded the IET Faraday Medal. Back to top ►Next Generation FPGA enabled DSP Communications Systems
Dr Chris Dick, Xilinx Inc, USA In just the last 10 years, the arithmetic capability of FPGAs has grown from just a few multipliers per device, to the latest family members which feature more than 2000 embedded multipliers. With this comes a tremendous level of processing power to address the various DSP algorithms and architectures that power modern digital communications systems. In this presentation we provide an overview of some of the baseband and digital-IF processing that is increasingly being realized on FPGA platforms and deployed in next generation wireless basestations. One of the key technologies for 4G and beyond wireless systems is sophisticated spatial processing, and we note that the compute requirements for spatial multiplexing (SM) MIMO receivers is significant, and well matched to the compute capabilities of modern generation FPGAs. An overview of the hardware realization of a sphere detector for SM MIMO decoding is provided along with implementation details and performance results. We also provide some commentary on R&D activities in the area of high-level programming models for FPGAs and how these next generation design flows are accelerating the adoption of FPGAs with a broad audience of signal processing engineers. Dr Chris Dick
is the DSP Chief Architect at Xilinx. He joined Xilinx in 1997
from La Trobe University in Melbourne Australia where he was a
professor for 13 years. Chris has authored many journal and conference
publications and has been an invited speaker at many international DSP
and communications symposiums. Chris' research interests are in
the areas of fast algorithms for signal processing, digital
communication, software defined radios, hardware architectures for
real-time signal processing, parallel computing, interconnection
networks for parallel processors, and the use of Field Programmable
Arrays (FPGAs) for custom computing machines and signal processing.
Chris has published many papers in the fields of signal processing,
wireless/mobile systems implementations, parallel computing, ISAR
imaging, and the use of FPGAs for building computing platforms for
signal processing applications.
►Immersive Audio - High Definition for the Mobile Age Dr Anthony Magrath
is the Director of DSP Technology at Wolfson Microelectronics, were he
leads the development of DSP algorithms and architectures for new audio
products. He was awarded his PhD in 1996 by King’s College London for
his work on the application of sigma-delta modulators to Class D
amplification. Since joining Wolfson he has worked in various fields
including Class D amplifiers, sigma-delta ADCs and DACs, digital filter
designs, sample-rate conversion, audio enhancement and more recently
active noise cancellation. Dr Magrath has authored over 30 technical
papers and patents in the field of audio signal processing. ►Acoustic Scene Analysis and Distant Talking Interfaces for Smart Indoor Environments
Professor Maurizio Omologo, Fondazione Bruno Kessler, Italy An
attractive scenario consists in the development of new workspaces where
ambient intelligence is realized through a wide usage of sensors
connected to computers that fade in the background, largely invisible
and significantly less intrusive to humans. Besides multimodal
approaches that exploit and fuse information available at sensors of
different nature (e.g. jointly audio and video), a fundamental step
towards this vision of ambient computing is to progress on automatic
understanding of the acoustic scene captured by a network of
microphones distributed in space. During the last decade several
approaches and techniques have been investigated, with the ultimate
goal being to classify concurrent acoustic activities and to recognize
speech, even under reverberant and noisy conditions. This presentation
aims to highlight some of the basic problems, which range from the
automatic location of multiple active speakers to the selective
acquisition and understanding of the speech message. Different
techniques and solutions will be discussed based on the achievements
recently obtained within European projects such as DICIT
(Distant-talking Interfaces for Control of Interactive TV), whose main
purpose is to realize real-time access to a smart assistant enabling
the interaction with TV-related digital devices and infotainment
services.
Maurizio Omologo
is the head of SHINE (Speech-acoustic scene analysis and
interpretation) project, under the Centre for Information Technology of
Fondazione Bruno Kessler - irst, Trento, Italy. Since 1984, he has been
conducting research in the areas of speech coding, speech
synthesis, multi-microphone front-end processing, speech enhancement,
and robust speech recognition, in particular focusing on
distant-talking scenarios and hands-free in-car interaction. He has
also been teaching the course of "Audio Signal Processing and Coding"
at the University of Trento since 2001. From 2003 to 2005,
he was Associate Editor of the IEEE Transactions on Speech and Audio Processing
journal. He acted as General Chairman of ASRU 2001 and HSCMA
2008 workshops, and contributed to the work of organizing and
scientific committees for several other international conferences and
workshops. Currently, he is Project Manager of DICIT,
a European Project of the VI EC Framework Programme, which deals with
distant-talking interfaces for control of interactive TV. He is a
member of the steering committee of AISV,
the Italian association on speech sciences. He also holds a
number of patents and has published more than 100 scientific
papers in major international conferences and journals in the
field
►Design Methodologies for Programmable System-on-Chip (SoC) DSP Based Systems Numerous
challenges exist in the development of system-on-chip (SoC)
architectures for DSP particularly for applications that do not have
the volume to justify silicon fabrication. In this talk, it is argued
that programmable SoC platforms in the form of processors linked to
programmable fabrics such as FPGAs are highly attractive but that
suitable design tool flow support is lacking for the development of
such solutions. The talk will outline the challenges of developing PSoC
methodologies, highlighting how issues such as energy, incorporation of
Intellectual Property (IP) cores and efficient use of memory resource
can be handled from a higher level of abstraction, specifically
dataflow. By considering this higher level of “model of computation”, a
dataflow-based programming environment for rapid implementation for
complex DSP system implementation, has been derived and is described in
the talk. It is shown how changes to parameters in the dataflow graphs
can have profound changes to the implementation, allowing the design to
be efficiently matched to the PSoC resources. A number of examples are
used to illustrate the concepts including a FFT-based digital receiver
and an MPEG2 image compression system.
Prof. Roger Woods
leads the Programmable Systems Laboratory at Queen’s University Belfast
and is internationally recognised for his expertise for FPGA
implementation of telecommunication and DSP applications. His research
includes programmable SoC (PSoC) architectures for telecommunications
and DSP applications, design tool flows and methodologies for PSoC and
design of new digital, musical instruments. He has considerable
experience on working collaboratively with industry (Xilinx, National
Instruments, QinetiQ, Roke Manor Research, Selex and DTS) and has
developed a number of chips, some of which have since been used
commercially. He has been general chair of FPL (2001), ARC (2009) and
the IEE FPGA Developer’s Forum (2003, 2005) and is on the program
committees of most FPGA conferences. He is a Fellow of the IET, a
Senior Member of the IEEE and a member of the advisory board to the
IEEE Signal Processing Society Technical Committee on the Design and
Implementation of Signal Processing Systems. He has published over 140
scientific papers, holds a number of patents in the real-time
implementation of digital filters and is main author of “FPGA-based
Implementation of Signal Processing Systems” book published by Wiley in
2008. He has recently formed a spin-off company, CapnaDSP involved in
the development of sophisticated tools which allow rapid implementation
of complex DSP algorithms onto PSoC platforms.
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